Exception and Crash case study in Cortex-A based Processor(Armv8-Aarch64)
Smartphones, AI System-on-Chip (SoC), Electric Vehicle Automotive (Infotainment, Autonomous Driving), and Arm processors used in cloud servers and MacBooks are all based on the Armv8-A architecture, which is a 64-bit Cortex-A processor (e.g., Cortex-A53, Cortex-A57, Cortex-A72). Currently, in the system software industry, knowledge of the Armv8-A architecture is considered essential as it is in high demand.
What you’ll learn
- The basic concept of Exception in Armv8-A.
- 4 exception provided by Armv8-A.
- Synchronous exception.
- IRQ and FIQ exception.
- Crash case studies.
Course Content
- Introduction –> 1 lecture • 11min.
- Introducing Exception –> 6 lectures • 45min.
- Introducing Exception in Armv8-A –> 4 lectures • 23min.
- Synchronous Exception – memory abort –> 3 lectures • 22min.
- Synchronous Exception – SVC –> 2 lectures • 10min.
- IRQ Exception –> 9 lectures • 52min.
- FIQ Exception –> 2 lectures • 16min.
- SError Exception –> 4 lectures • 20min.
- Exception handling at EL1 –> 4 lectures • 16min.
- How to analyze exception vector table –> 4 lectures • 24min.
Requirements
Smartphones, AI System-on-Chip (SoC), Electric Vehicle Automotive (Infotainment, Autonomous Driving), and Arm processors used in cloud servers and MacBooks are all based on the Armv8-A architecture, which is a 64-bit Cortex-A processor (e.g., Cortex-A53, Cortex-A57, Cortex-A72). Currently, in the system software industry, knowledge of the Armv8-A architecture is considered essential as it is in high demand.
This lecture covers the Exception, that is the key feature of Armv8-A architecture necessary for the development of software systems. The intended learners will understand;
- Concept of Exception
- How Arm core generates Exception
- System call or Secure monitor call
- Exception vector table
To understand key features of Armv8, we need to primary concept of Exception. This lecture explains the details of Exception which is not discuss in the conventional course which includes;
- Which registers are updated when Arm core generates exception
- Correlation between exception vector table and exception handler
- Common scenario of exception handlers
- How IRQ and FIQ is handled under secure environment
- How exception level is switched
In general, a piece of software, such as an application, the kernel of an operating system, or a hypervisor, is implemented using exception. So understanding exception is important. If you understand what this lecture cover, you will have;
- Strong debugging skills
- Broaden your insight of system architecture
- Better understanding of Armv8 architecture